The Sinclair QL Forum

Hmm sorted through the bundle - 4 x Super Gold Cards, 2 x Gold Cards, a few QL books, 3 x sets of ED disk drives, plus a few books.

No software (which is odd - I must ask the person I bought them from for another root around), but there are 15 packs of sealed cases with 4 microdrive cartridges in each !!

I have tested all of the hardware - the 6 QLs included in the package need some work on them unfortunately, but heck I have about another 30+ in stock already (plus boxed QLs galore) !!

Check out the items as I list them for sale -
http://www.sellmyretro.com/category/All ... inclair+QL

Snagged a Super Gold Card!

Now, how can I claim it's a Chrissie present for 'er indoors?!

Isn't the ROM to RAM just to speed up the data access?

No, SGC copies the QL ROM to RAM and then patches it.
I.e., if you have Minerva ROM inthe QL, SGC loads and patches Minerva ROM and runs with it, if you have JS ROM, SGC loads and patches JS ROM.

I'm surprised about the 68020 being slowed down

Not slown down, but not using the extended 68020 hardware to ensure compatibility with 68000/68008.

The manual says:
QL programs are written for the 68000 and there is software on the Super Gold Card to make it look as much as possible like a 68000 system.
...
The golden rule is: assume you are writing for the 68000.
...
We did not use or need a 68020 assembler in extending the Gold Card software for the Super Gold Card. The only 68020 instruction is the one to write to the cache control register. The cache is always on in supervisor mode and should not be turned off. To do so would cause problems for device drivers such as the Microdrives which are written to work at the speed of the 68020 with its cache enabled.
(i.e., Super Gold Card uses its own, patched, microdrive drivers.)
...
Reading the status register: The instruction to read the status register: MOVE.W SR,<ea> is privileged on the 68020. For QL program compatibility the Super Gold Card intercepts this privilege violation and emulates the instruction in software.
...
Exception stack frame: The 68020 stacks at least one additional word of information when an exception is generated and consequently expects this additional information when the RTE instruction is executed.
If your programs use the technique of going from user mode into supervisor mode and stacking an address and the status register and then executing an RTE to return to user mode they will cause problems on the Super Gold Card. If your program entered supervisor mode from user mode only return to user mode by writing to the status register.

Thanks for the info Dex.

So, 68K core on FPGA is propably do-able (Atari ST 68k core seems the completest)

It's just the microdrive/a.n.other/etc settings that we would need to change the timings for if we change the clock frequency (Don't envy that). Maybe a second processor to drive microdrives, so 68K can clock at different clock speeds?


Anyway, first thing is putting 68K core on a FPGA, and sticking that, in place of a 68000, on a Gold Card.
Note, all the modern FPGAs are 3.3V maximum or less so you need some birectional buffers with voltage change as well.

Next, integrate the WD1772 and the IDE into the FPGA and clock up the speed (Atari ST core have a WD1772 and IDE cores).

Whilst you are doing that, apply for PhD or Masters in "Ways Round Obsolete Electronics" (I hear 68000s are still going strong, at least in an industry that has a 30-year active life).

Finally, integrate a Gigabit Ethernet and release it to the masses...


Unfortunately, in the new year, I'll be contracting in Edinburgh, so commuting up and down will use up all of my spare time.



Tim

RWAP, your site is down at the moment - traffic????????

Mr_Navigator wrote:RWAP, your site is down at the moment - traffic????????

I wish - something about the SAN servers having to resynchronise causing huge delays on their VPS servers....

twellys wrote:

Unfortunately, in the new year, I'll be contracting in Edinburgh, so commuting up and down will use up all of my spare time.

Good luck in Edinburgh - it's a pitty that your contracting work will eat up all of your sparetime ...

I'm amazed at all the new ZX81 stuff, that machine is having a strong revival!

dex wrote:

Isn't the ROM to RAM just to speed up the data access?

<snip>
The manual says:
QL programs are written for the 68000 and there is software on the Super Gold Card to make it look as much as possible like a 68000 system.
...
The golden rule is: assume you are writing for the 68000.
...
We did not use or need a 68020 assembler in extending the Gold Card software for the Super Gold Card. The only 68020 instruction is the one to write to the cache control register. The cache is always on in supervisor mode and should not be turned off. To do so would cause problems for device drivers such as the Microdrives which are written to work at the speed of the 68020 with its cache enabled.
(i.e., Super Gold Card uses its own, patched, microdrive drivers.)
...
Reading the status register: The instruction to read the status register: MOVE.W SR,<ea> is privileged on the 68020. For QL program compatibility the Super Gold Card intercepts this privilege violation and emulates the instruction in software.
...
Exception stack frame: The 68020 stacks at least one additional word of information when an exception is generated and consequently expects this additional information when the RTE instruction is executed.
If your programs use the technique of going from user mode into supervisor mode and stacking an address and the status register and then executing an RTE to return to user mode they will cause problems on the Super Gold Card. If your program entered supervisor mode from user mode only return to user mode by writing to the status register.

A lot of the above are problems on any 68k system where you are replacing the MPU. On Atari ST's for example you can replace the 68000 with a 68010 and any software that tries to read the status register in user mode will fail.
And on any MPU system where the main processor is used for timing, any change of clock speed will break any direct input or output code or "drivers".

Mark