Re: Still possible to get Minerva ROM
Posted: Thu May 25, 2017 12:32 am
That's right. Tony put them in the box when he shipped me the mPlane PCBs. Laurence Reeves is on my FB, I'll hit him up.
RIP Sir Clive Sinclair 1940 - 2021
https://qlforum.co.uk/
Ah, missed your reply, Tobias. Unfortunately Sinclair had the ROM chips custom made, IIRC one chip had an inverted Chip-Enable signal or something like that so they could save another cent by leaving out an external NOT-gate. As a consequence there are no drop-in replacement for the ROMs, some form of external circuitry is always needed.tofro wrote:You only need someone to burn the chips for you and they should be a plug-in replacement for the original QL ROMs.
I did have a look at the 23128 data sheet and you're right, it's not Sinclair specific, the level of the CS pin can be configured with these chips and Sinclair just configured them complementary on the two chips. Still, nobody will ever try to burn 23C chips and all 27C EPROMs or even EEPROMs need some kind of external circuitry, that's all I wanted to say really.tofro wrote:Marcel,
you might want to read my post again, then verify with the QL schematics:
Issue 5 QLs were made to run from a variety of ROM chips and combinations. The setting was made with a number of jumpers and additional components on the mainboard. The QL could then support various sizes of ROM/EPROM selected from bog standard 2764/27128 EPROM and 2364/23128 or even a single 23256 ROM chip. There's absolutely nothing special with the Sinclair ROM chips in the QL (other than that they're ROMs, not EPROMS, normally).
Issue 6 QLs no longer gave you the choice of various ROM/EPROM configurations and supported the well-known 2364/23128 combination of 48k ROM only. Still, the chips were standard 23xxx types, nothing Sinclair-specific (or how could my EPROMmer read them if they weren't?).
Dave wrote:The adaptor did not fix address decoding. It contained a registered GAL to facilitate the I2C and allow communication with the clock IC for the battery backed clock. I have 50 MK2 Minervas, but unfortunately I do not have the GAL code. The GAL was read-protected. Since it is a registered GAL and not simple combinational logic, I have been unable to recover or reconstruct the contents.mk79 wrote:The adaptor is needed to fix the adress decoding for a 64kb EPROM. In my old QLs we actually did the same by clueing an SMD NAND chip on top of the EPROM plus some flying wires. Or you can for example buy the QL-SD interface, it also comes with a daugther board that does the same, so that's a plug'n'play solution
If anyone has a copy of the contents of the GAL code, I have 50 Minerva MKII with battery backed clock and I2C available immediately.
Code: Select all
ii_clock
move.l sv_free(a0),a1 set buffer pointer
move.l a1,a4 duplicate start of transfer
lea cmd,a3 point to command sequence and masks
bsr.s ii_drive try to get the I2C clock stuff
move.l a1,a2 top of clock data
beq.s more if it works, great (1st byte is junk)
moveq #mt.rclck,d0 fall back to internal clock read
trap #1
rts
ii_drive
move.w ii.drive,a2
jmp $4000(a2)
more
and.b -(a2),d0 use mask byte to junk msd flags bits
moveq #15,d1 mask for lsd and msbs all zero
and.b (a2),d1 get lsd
lsr.b #1,d0
add.b d0,d1 lsd + msd/2
lsr.b #2,d0
add.b d0,d1 lsd + msd*16/2 + msd*16/8 = lsd + 10*msd
move.l d1,(a1)+ push onto stack
move.b (a3)+,d0 get next mask byte
bne.s more if not ending zero, keep on going