All RAM chips destroyed??

[Pr0f]

Is it right that the 68008 address lines can only source 400uA because if so they should be buffered before going on to other things. An LSTTL input can take 100uA and I don't know what the two ROMs take then the lines leave the board via ROM and expansion connectors that is asking for trouble since there is no control over any external loads.

That doesn't seem correct - the power dissipation for the whole device is rated at 1.5W, but I only found a few notes on current loads in the DC table - showing figures between 1.5ma and 5ma for various outputs. You should also keep in mind that there is current sink and current source - so it will depend on which one is applicable.

[Pr0f]

DC Table:

[Ruptor]

showing figures between 1.5ma and 5ma for various outputs. You should also keep in mind that there is current sink and current source - so it will depend on which one is applicable.

Yes that is what I am saying they quote big mA for sinking but only -400uA for sourcing if you look at the Voh it gives Ioh. I couldn't find an actual output source current capability.

[Pr0f]

But with nmos, signals are pulled low - so that's ok

[Ruptor]

But with nmos, signals are pulled low - so that's ok

Sorry do you mean the ROMs that are TTL compatible but there is the LSTTL buffer and the external unknown ROM and expansion ports.

[Pr0f]

For most of the CPU lines, they are only connected to at most about 4 devices - A15 for instance, goes to one of the 257 mux inputs and to the 2 ROMS - and to the expansion and ROM sockets. Only 3 devices.

Similar story for most of the lines. In the technical manual for the QL it does stipulate that expansion cards should buffer signals, although some do not buffer address lines going to only the ROM on the expansion card. Drive of the CPU should be able to deal with that.

The document below helps to explain TTL input and output capabilities:

https://www.classe.cornell.edu/~ib38/te ... xp3F10.pdf