Backplane and other problems

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RalfR
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Re: Backplane and other problems

Postby RalfR » Sun Sep 05, 2021 5:08 pm

Thanks Dave. I think, this is an updated FLP driver from Tony Tebby, not the original Medic firmware.


KINGCHEF
ROM Dongle
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Re: Backplane and other problems

Postby KINGCHEF » Thu Oct 14, 2021 8:42 pm

Hi,
Away but not idle.
I rebuilt my backplane having decided that the connector at the QL end was distorted and slack. Possibly enough to get random connections.
Having rebuilt it and tested all the soldering I'm still getting erratic results. I'm trying to use my Medic disk i/face together with my QEP III eprom programmer. This combination worked well for several years so I'm sure there is not a ROM conflict.
I have sometimes a white screen, sometimes a black screen, and after I transferred a MINERVA rom into the QL I get random memory errors. A real selection, but all based in the QLs own memory not in the expansion. Running through the which RAM? calculator gives me RAM chips that are bad on one pass and O.K. on the next. Is there another chip that might be faulty and causing this.
I did get the 2 boards to register together once but it only saw 64k memory. Individually the boards work fine in whichever expansion slot I choose, but sometimes still with random memory faults. The QEPIII works O.K. with a 512k expansion board I have.

I was copying ROMS during my enthusiasm for the OPD and have most of the images on Disk. Since OPD ROMS were 256k does anyone know how one could copy a 256k image using the QL and save it without a disk drive?
Thanks
Dave


Silvester
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Re: Backplane and other problems

Postby Silvester » Thu Oct 14, 2021 10:21 pm

The internal RAM chips are accessed by the CPU through IC19,20,21. They are also frequently read by IC22 ZX8301 to produce the display, by which means they get regularly refreshed (as required for DRAM chips). See: http://www.dilwyn.me.uk/docs/hardware/QLissue6.pdf

IC19,20,21 are known culprits for causing sporadic internal RAM problems (unlike more consistent specific RAM chip faults which Minerva reports).

IMHO the first thing I would check is ZX8301 contacts in socket (they have habit of discolouring over time), try reseating. I doubt the chip itself would cause erratic RAM faults. If the ZX8301 is OK I would then suspect one of IC19,20,21 are failing - the only recourse is to remove (best by cutting pins at elbow and carefully unsolder remains of pins) and replace with sockets and HCT equivalents.

The white/black screens may be produced by faulty IC21 (data bus), so I would do that one first.


David
KINGCHEF
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Re: Backplane and other problems

Postby KINGCHEF » Fri Oct 15, 2021 3:50 pm

Ha!

I've dragged out another QL. My last backup and standard JM but fully working and Minerva finds no memory problems.
Right back at the beginning I mentioned that one track on the backplane had been cut and connected to GND on the 5v regulator. I can see that it was my work but I had no recollection of doing it or of getting advice to do so. However, this was the state when the system was fully working.
I had re-instated the previously cut track because other problems with the QL seemed to make this change neutral.
So I tested all the add ons, gradually building up to the full set of disk i/face and QEPIII. No errors or lockups but the logging in of the Disk and QEPIII was garbled and the EPROM startup command for the programmer just gave a 'bad name' message. I'm a little further on, anyway.
I swapped the JM roms for Minerva with the same result.
I cut the track and connected it to the 5v Reg. No improvement.
THEN the wire from the cut track to the regulator became detached.
Suddenly everything is working again.
The track that has been cut looks like A5 which is D6 on the expansion bus diagram. I previously thought it was B5 (ASL) but the backplane folds the disk i/f board back on itself and I mis-read it.
I'm pretty sure you can't go around chopping off Data lines like this so any ideas on what is going on?
I have 3 QLs in pieces and faulty chips to replace ( it looks like, though I'll check it all again ), before I can return to my workhorse QL.
Thanks for listening...............


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Pr0f
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Re: Backplane and other problems

Postby Pr0f » Fri Oct 15, 2021 6:20 pm

ASL isn't used on standard QL expansions - so that could be cut with no issues.

QEPIII probably expects to be at 0c0000 - but it's designed to use the slot select lines SP0-SP3 - which are all 0v from the QL - hence that default first address for the QEP card.

Does your backplane alter the SP0-SP3 lines for each board location?

Also - are you plugging in any cards such as Trump, Gold Card or SuperGold Card - as all those put memory where those peripherals were expected to be in memory map.


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Pr0f
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Re: Backplane and other problems

Postby Pr0f » Fri Oct 15, 2021 6:21 pm

QEPIII also uses the synchronous bus signal E which is not provided by Gold or SuperGold cards.


KINGCHEF
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Re: Backplane and other problems

Postby KINGCHEF » Fri Oct 15, 2021 7:44 pm

Just the Medic disk interface with 512k Memory and the QEPIII.


KINGCHEF
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Re: Backplane and other problems

Postby KINGCHEF » Fri Oct 15, 2021 7:45 pm

Backplane alters nothing. Just carries each line through.


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Pr0f
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Re: Backplane and other problems

Postby Pr0f » Fri Oct 15, 2021 8:30 pm

looking at the circuit diagram for the medic- it also uses the same SP0-SP3 decoding scheme as the QEPIII - meaning if your backplane doesn't alter any of these SPx signals - the QEPIII and Medic disk interface are trying to use the same address. If you cut the line for SP0 on the backplane after the first slot, and jumper that signal to 5v - the other slots will move along one in the peripheral range - either board should then work in either of the first 2 slots.


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Ruptor
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Re: Backplane and other problems

Postby Ruptor » Fri Oct 15, 2021 11:21 pm

KINGCHEF wrote:I cut the track and connected it to the 5v Reg. No improvement. THEN the wire from the cut track to the regulator became detached. Suddenly everything is working again.
Does that mean one side of the cut track was floating? I am sure PrOf has given sound advice but since you are not clear what lines are involved it is based on quicksand. You need to establish exactly what lines are involved to give a solid datum to work from.



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