Happy Birthday

Not 68K, but probably not too difficult to transpose to 68K c or assembler:

https://calcium3000.wordpress.com/2016/ ... al-part-i/

Also, the 68K vector area and etc. are so small, it might be unnecessary to remap the DPRAMs, IF they do not conflict with a ROM image. I haven't tackled that part of the design yet. you can use the FC0-FC2 to signal a fetch of restart vector - as it's different to other vector fetches - and could ...

Thanks Derek - I will take that one

What's the Quick QL machine language book like Derek?

I might be interested in that one.

that's a very sparsely populated board !

Has anyone got an Aurora board or pcb and some parts to put one together ?

I thought there were some heavy license costs with those embedded arm core FPGA's ? I was looking at the bemcro-CV a9 board when it was available, which had an A9 ARM core on board, but I was mainly interested in the large logic element count ideal for making a 'big' VHDL propeller chip implementati...

You could also take the approach that each CPU would be it's own QL - effectively virtualising the QL into a logical entity with real CPU and memory, and only having the I/O as common

A new device could act as an inter processor gateway

I think if you are going down the route of symmetric multiprocessing - you are talking about 68K compatible cores. Something along the lines of - I've got a job to run... ...How many processors are registered with me ? … There are 8 of us on line - cpu 5 is the next one to get a new job --- Dispatch...