Don't forget the Hewlett-Packard line of 68000 computers. The first one, the 9826A, was released long before the QL in 1981. The HP Basic that was included with these computers was very fast and much more complete than anything available for QLs, Amigas and Ataris. As an example, a HP9816 with a 680...

Constant speed is not required for I2C, it should just not be too fast. There is very little SRAM, so it should only be used if speed is critical. I2C is low speed, so unless there are very special applications, normal SDRAM is okay. Ok, good to know. I get it now, data follow the clock signal, clo...

Hi, Hope to have some spare time during the holidays. On the program: using I2C on the Q68 and one day, the QL-NET. A few questions: I2C: From the Q68 user manual, I see that the two I2C pins can be controlled by writing bytes at address $1C1C0 and $1C1C4. I also remember reading that there is no su...

On an Atari TT030 (30MHz 68030) it takes 127 seconds. Unfortunately SMSQ/E doesn't run in fast RAM so I can't test it with the uncontended EDO RAM only the slow RAM shared with the video sub-system. But if we assume the code is so small it should run from cache, the RAM speed should not matter... A...

Peter wrote:My 80 MHz Q60 takes 18 seconds for 2000000.

That's fast!

François

I don't know if my 56mhz board can be operate at 28mhz. Maybe there is a jumper somewhere to chose the frequency. I will check. Thank you. Hope it is not too much work. But make sure that the jumper setting also changes the SDRAM burst to 2-1-1-1, not just the clock. I checked and there is only one...

QL ready to run for me, please. I'm very curious how the 80 MHz Q60 performs. Here it is. It should run on any QL system with at least super toolkit II. 90 REMark change to ALFM to work from Q68 SRAM 100 addr=ALCHP(210) 110 FOR i=0 TO 104 120 READ d$ 130 POKE_W addr+i*2,HEX(d$) 140 END FOR i 190 IN...

Now the Q68 - The 030 approaches 1 instruction per 2 cycles since the whole benchmark fits inside the cache. If we scale it's result to 80MHz (to match 2x 40MHz of the Q68), to compare with Q68 running from SRAM at near 1 instruction per cycle, we get 49.7 secs, so the Q68 is actually faster by abo...

Of course the 4% and 10% differences may well be initial cache loading, but the figures are close enough to do a valid comparison. Don't forget that all these computers, Amiga, QLs and NextStation are multitasking computers. I made sure the benchmark was the only application running, but each syste...

Hi François, Since we came from the SGC successor discussion, where a 50 MHz 68EC030 was considered versus a Q68 with (yet unfinished) cache: Could you provide the Amiga 68EC8030 accelerator board result with 28 MHz? At this clock rate, it supports an ideal 2-1-1-1 cycle burst which is the fastest ...